Dr. Nathan Blattau to present Oct 8th at the IEEE ASTR Workshop in Jersey City, NJ

On Thursday, October 8th, Dr. Nathan Blattau will present, "Thermo-mechanical Fatigue Testing of Printed Circuit Card Assemblies Using Power Cycling" at the annual IEEE ASTR (Accelerated Stress Testing and Reliability) Workshop in Jersey City, NJ.

Check back after the event for a recap and link to his material and presentation!

About the ASTR Workshop
Over the last few years, Accelerated Stress Testing & Reliability (ASTR) has been embraced by an ever widening array of worldwide companies seeking to reconcile the need for the highest quality product with the necessary push for early time-to-market. The purpose of the ASTR Workshop is to share ideas on better ways of accelerating and detecting hidden defects, flaws, and weaknesses in electronic and electro-mechanical hardware that would result in failures during usage. These techniques are focused on testing electronic hardware to operation and and destruction limits and root cause investigation to determine the physics-of-failure. The goal of AST is to produce mature products at market introduction and efficient an effective sampling screens to monitor for manufacturing excursions with high combined stresses (beyond end-use specifications) for shorter lengths of time. The 2009 workshop will focus on ASTR topics in renewable reliability. This theme will be timely, considering emerging world wide investments towards development and commercialization of sustainable and green energy technologies to generate economic growth and environmental security. The workshop will be held at the Hyatt Regency Jersey City on Hudson, overlooking the New York City skyline.