DoD watchdogs are stating that the military is wide open for intrusion by counterfeit parts. Crackdowns are occurring, but the boldness of counterfeiters is increasing. DfR has a complete understanding of how we can help you with this dilemma. Greg Caswell, firstname.lastname@example.org, will be presenting a paper entitled "Counterfeit Detection Strategies-When to Do It/How to Do It" at the IMAPS Symposium on November 2. In addition, a new and unique methodology, "Using DNA to Safeguard Electronic Components," for obviating counterfeit parts will be presented by Janice Meraglia, email@example.com, from Applied DNA Sciences.
Sunday, October 31, 2010
Saturday, October 30, 2010
Greg Caswell's wife June is a quilter and has produced some interesting designs over the years. This article about a "circuit board" quilt brings art and technology together.
Friday, October 29, 2010
SquareTrade provides failure percentage information on a variety of electronic products with VERY SCARY figures; some with failure rates as high as 26% within the first two years of a product's life. Recently, they have examined iPhones, digital cameras, laptop/netbook computers, and computer game boxes. Understanding failure mechanisms is what DfR does best and working with customers to improve their products so that warranty issues are not a problem is a focus. Please contact Tom Johnston, firstname.lastname@example.org, for more information.
Thursday, October 28, 2010
A recent survey by Atenga, Inc. pointed out that buyers of remote monitoring and control systems were unhappy with the reliability of the products. Solving this type of problem is right up DfR's alley. DfR can work with design engineers to facilitate enhanced reliability in a product during the design stage. Don't let your product end up in surveys like this one; contact Craig Hillman, email@example.com, for more information.
Wednesday, October 27, 2010
DfR engineers have definitive experience is electrical characterization and skill in developing the parameters for proper operation of specialized components in their application environment. Triacs are one such component type and this white paper describes the step by step methodology followed to provide this level of insight to our customer. For more information regarding electrical characterization, please contact Robert Manzanares, firstname.lastname@example.org.
Tuesday, October 26, 2010
Increased circuit board densities coupled with the need for higher electrical performance have resulted in a new reliability challenge, that of vias in close proximity to either SMT or BGA pads. In an effort to reduce inductance, increase density or employ finer pitch array packages, via pads are being placed close to the SMT/BGA lands. Thicker PWBs, due to higher I/O array packages exacerbate these issues as larger holes and pads may be required to maintain through-hole reliability. DfR has extensive experience in both modeling the filled via concept and analyzing failures associated with this defect. For more information contact, Nathan Blattau, email@example.com.
Sunday, October 24, 2010
The military and high reliability market segment have maintained a higher level of stability over the past couple of years. Military manufacturers are, for the most part, still using Sn/Pb materials. The commercial industry has used Pb-free for several years and the medical industry will be following in the next couple of years. Military suppliers are using approaches such as reballing of BGAs with Sn/Pb to utilize them. DfR has extensive experience regarding the reliability of the reballing of BGA packages. Joelle Arnold, firstname.lastname@example.org, recently presented a joint paper with Stephan Meschter of BAE at the IMAPS Advanced Technology Workshop on High Reliability Microelectronics for Military Applications.
Friday, October 22, 2010
DfR is looking for two senior members of the technical staff. The first should have 10+ years of mechanical engineering experience and an operational knowledge of Abacus modeling software. The second should have 10+ years of experience in a technical discipline (SMT, Solar, LED, etc.). Both will be expected to manage and assist on DfR projects, write technical reports, make presentations at conferences, and provide guidance to staff engineers. In addition, DfR is looking for a staff engineer to support our laboratory team. Send your resume and cover letter to Tammy Smittenaar, email@example.com.
Thursday, October 21, 2010
Wednesday, October 20, 2010
Tuesday, October 19, 2010
Thursday, October 14, 2010
Monday, October 11, 2010
Saturday, October 9, 2010
Wednesday, October 6, 2010
While most companies are acutely aware of the hazards of electrostatic discharge (ESD), few are aware of just how pervasive ESD failures actually are. Recent studies into the misdiagnosis of these failures suggest that ESD damage may, in fact, be a dominant failure mechanism on the factory floor and in the field. Attend this joint webinar to learn the latest facts about ESD damage, failure analysis, and design-related ESD damage prevention techniques.
Dangelmayer Associates offers a full range of customized ESD/EOS (Electrostatic Program Management/Electrical Over Stress) professional consulting services on a Global basis for both product design and manufacturing, including but not limited to S20.20 Programs, Class 0, CDM, Charged Board Events, S20.20, EOS and Cleanrooms.
Introduction to Dangelmayer Associates, DfR Solutions and Speakers
EOS and ESD Impact and Roadmap, Devide Sensitivities and Procedures (Industry Council)
Defect analysis pareto
EOS and ESD dominance
ESD Models - Brief Background and Overview
Event characteristics - comparing energy/power/risetime
Human Body Model (HBM), Charged Device Model (CDM), Electrical Overstress (EOS) differentiation
Board and assembly level models
Charged board event (CBE)
Cable discharge event (CDE)
EOS Diagnosis and Misdiagnosis - Case Studies
How did they come to this determination?
Failure analysis tools typicall used for EOS/ESD/EOL
Other similar failures that are commonly mischaracterized
Damage Prevention Techniques
IC level protection strategies
Board-level (off chip) design solutions
The cost to attend the webinar is $75. A Professional Development Hours certificate is available for an additional fee of $25. Please click here to purchase.
All presentations require the use of Adobe Flash Player to view.
Tuesday, October 5, 2010
Best Accelerated Life Tests: Oct 11-12, Instructor: Mike Silverman
Root Cause Analysis (RCA): Oct 13-14, Instructor: Cheryl Tulkoff
Design for Mechanical Reliability: Oct 15, Instructors: Kim Parnell & Cheryl Tulkoff
For registration details, please click here.
Courses will be held each day from 9 am - 4:30 pm on the National Instruments campus.
All breaks, lunch, and course material provided!
Sunday, October 3, 2010
If you'd like to schedule a meeting at the Expo, please contact Cheryl Tulkoff, firstname.lastname@example.org.