Showing posts with label pb-free. Show all posts
Showing posts with label pb-free. Show all posts

Friday, November 4, 2011

The FAA and Pb-Free

The FAA has issued a nuanced memo that defines their position on Pb-free. They recommend familiarity with GEIA documents, a focus on five critical areas (solder joint reliability, tin whisker, repair, configuration, and obsolescence), and state that no avionic failures have been traced back to Pb-free finishes. Looking for assistance with tin whisker mitigation or lead free control plans (LFCP)? Contact Randy Schueller, rschueller@dfrsolutions.com, for more information.

Sunday, October 23, 2011

Lockheed Martin Pb-free Electronics Workshop in College Park, MD on October 27

Lockheed Martin has invited Craig Hillman to present on the broad range of Pb-free research and development activities currently being performed at DfR Solutions. If you would like a similar informative update at your facility, please contact June Caswell.

Friday, October 7, 2011

DfR's Randy Schueller & Cheryl Tulkoff published in Medical Electronics Design Magazine


Get the Lead Out


The revised RoHS directive will require medical electronics manufacturers to adopt new reliability testing strategies.

The first Restriction of Hazardous Substance (RoHS) legislation out of Europe, in 2006, provided an exemption for medical electronics. However, a second version that modifies this exemption has been released. Medical devices will be covered as of 2014, in vitro diagnostic equipment as of 2016, and industrial monitoring and control instruments as of 2017. The importance of planning for lead-free products is evident, especially considering the high reliability requirements, long development, and product run times in the medical device field. Many products being developed today will be sold beyond 2014.

Fortunately, the medical electronics industry can benefit from experience gained by other industries that have eliminated lead over the past several years. There are difficulties and risks associated with this significant change, but they can be managed. Experience from the consumer electronics industry shows that it is important to dedicate resources to the lead-free transition effort and to support it from the top down within an organization. Some companies have also used the opportunity to implement other best practices, such as improved process control and more thorough reliability testing. Eliminating lead also provides the chance to clean house and remove old test procedures that are no longer relevant.

This article addresses the reliability testing aspects of a lead-free conversion and provides a foundation for developing a lead-free reliability test plan.

Reliability Testing

To achieve consistent lead-free reliability testing, a well-thought-out document detailing the reliability requirements of the end products is useful. Naturally, many medical device companies have a wide range of products that vary in complexity and may fall within different FDA classes. The levels of reliability testing may be different for each class of products. Additionally, there may be several phases of product development, each with differing reliability requirements. These factors need to be considered when writing qualification requirements for lead-free medical products.

Structure of Qualification Document

One way to structure a qualification document is to recognize the phases of development used within a company and incorporate these into the structure. If phases don’t exist today, create them as part of the lead-free transition strategy. There are three key phases on which to focus.

Phase 1—Material Selection. Critical materials to select and optimize for medical electronics include:

  • Solder paste alloy and flux type for surface mount (no-clean, rosin flux, etc.).
  • Wave solder alloy and flux (if applicable).
  • PCB laminate.
  • PCB surface finish.
  • PCB copper thickness and via sizes.
  • Conformal coating (if applicable).
  • Rework materials.

The objective of this phase is to run any experiments needed to select the appropriate materials for the product. These materials give the product the best chance for passing the subsequent reliability testing. Testing in this phase might include interconnect stress testing (IST) of the printed circuit board (PCB) to ensure the laminate and copper thickness values provide sufficient life or temperature-humidity-bias testing to check for conductive anodic filament (CAF) formation. Fluxes would be evaluated with surface insulation resistance (SIR).

Phase 2—Reliability Testing to Validate the Material Selections. This phase involves the use of a test board. Converting a production board (same shape and attach points) into a daisy chain board by modifying the circuitry is ideal. Major components such as ball grid arrays (BGAs), surface mount connectors, quad-flat no-leads (QFNs), large resistors, or other higher risk components would have their solder joints daisy-chained for easy resistance monitoring during testing. This test board would then be subject to test to failure conditions in thermal cycling, shock, vibration, highly accelerated life testing (HALT), and, perhaps, corrosion testing. Testing may take place at the board level or while the board is fixed into the product (for drop testing, as an example).

An important part of this testing is the analytical work performed to evaluate the results and failure mechanisms. Cross-sectioning and dye and pry (D&P) analysis are often required to determine how failures occur and provide guidance on how to improve the product.

Images of dye and pry analysis

Phase 3—Product Qualification. The final phase may be qualification of the product. In this phase, the final production boards are built in the assembly line that will produce the product in volume. Qualification is performed in the traditional “test to meet specification” format. Testing might include thermal cycling (if applicable), HALT, temp-humidity, high temperature operation, shock testing, etc. Some flexibility in these tests might be needed to accommodate the wide range of products and environments required. The pass-fail criteria may be set based on previous qualification testing of similar products or determined based on the specific requirements of the product.

It is important to perform detailed analytical analysis of the product following testing to ensure no failures were missed by the electrical verification testing. For instance, there might be solder joints that are completely fractured but still make sufficient electrical contact. Pass-fail criteria might need to be set on the condition of the solder joints. For example, if D&P analysis reveals cracks of 50% of the solder joint, are these considered a failure? The answer depends on whether the test was meant to cover the full life of the product, such as thermal cycling, or if it was meant to cover shipping conditions, such as a shock-vibration test.

Product Levels

Upon review of the product types to be converted to lead-free soon and in the foreseeable future, a decision might be made to sort them into various product levels. The levels might be separated according to FDA class, or they could be separated further, by the complexity of the electronics involved. For example, there might be three levels.

Level 1 might be defined as:

  • PCBs with layer counts < 6.
  • PCB thickness is <0.062 in.
  • There are no BGAs or flip chip components.
  • Expected product life is 3¬–5 years.
  • Product is not critical to patient life.

Level 2 might be:

  • PCB might be thicker with higher layer count.
  • BGAs and/or flip chips might be on board and require underfill.
  • Expected product life is 5–7 years.
  • Product is not critical to patient life.

Level 3 might be:

  • Expected product life is 5–10 years.
  • Product is critical to patient life.

The qualification test plan may be different for each level of product. Conductive Anodic Filament (CAF) testing, for example, might be required for Level 3 products only. Or, it might be decided that Phase 2 is not required for Level 1 products.

Reliability Test Plan

Once test structure and strategy has been determined, the complete reliability test plan can be constructed. The test plan will include the test types, parameters, measurement methods, sample sizes, test flow, analytical techniques to evaluate the results, and pass-fail conditions. The tests may include any tests that would traditionally be run to qualify the product, but some tests or analytical techniques might be added due to the change to lead-free solder. Table I illustrates one way to think about the lead-free changes, the areas they impact, and the test and inspection methods to evaluate the product.

[6]

Table I. Highlighted are areas of concern due to lead-free transition and what test and inspection techniques can be employed to ensure the product quality/reliability has not suffered due to these changes.

Sample sizes used for testing are important and should be decided up front as much as possible. Some flexibility in sample size might be needed to account for different product types and availability of material. If rework is allowed on the final product, then it’s a good idea to test the reliability of reworked boards to ensure they meet requirements. In such a case, the rework procedure for each component needs to be predefined, so representative production rework is evaluated.

Additionally, the material supplier matrix needs to be considered when creating the test plan. That is, will all suppliers on the approved vendor list (AVL) be used in the qualification? The most critical suppliers include the electronic manufacturers (EM) and the PCB fabricators. It is important to qualify each EM separately and to include PCBs from all suppliers on the AVL. Other components deemed critical should also have all suppliers on the AVL included in the reliability testing.

Reliability Tests

This section will describe a few of the most common reliability tests and inspection techniques, their purpose, and typical conditions.

Thermal Cycle Testing

The primary purpose of thermal cycle testing is to repeatedly create thermal expansion mismatch stress on the solder joints, thus fatiguing them. Surviving a sufficient number of thermal cycles provides confidence that the product will survive the required period of time in the field. This is a test where the acceleration factor can be approximated, thus allowing extrapolation of test conditions to use conditions. Thermal cycle test procedure details are outlined in JESD22-A104-B. If different levels and program development phases are used, then a custom thermal cycle test table might need to be created.

An important parameter of thermal cycle testing is the dwell time at elevated temperature, and this is especially true with SAC305 solder. When the solder is given sufficient time to fully creep, the reversal in temperature creates a higher stress on the solder joint. Tin-lead solder creeps rather quickly, so the impact of dwell times greater than 15 minutes are relatively small compared with SAC305, where the creep rate is much lower. Research shows a consistent reduction in thermal cycle life of 40–60% when the solder is allowed to fully creep (long dwell time).1,2,3 If the product will have long dwell time at elevated temperature in operation, then either recreate this long dwell in the testing (which can be expensive) or compensate for the effect by reducing the results by 50%.

Mechanical Shock and Vibration Testing (S&V)

Vibration testing components in resonance

There are typically two reasons for performing S&V testing. The first is to simulate the worst-case shipping conditions that could occur in delivering the product to the customer. The second is to simulate the S&V conditions that are expected under reasonable use of the product in the field. A good standard for shock testing is JESD22-B104-B “Mechanical Shock.” Similar standards exist for vibration testing. The switch to lead-free does not require a change to the shock and vibration parameters that were used for tin-lead products. One aspect that might benefit from additional thought is the pass-fail criteria. Traditionally, a fail is designated as an electrical open following the testing. D

ue to the brittle nature of lead-free solder and the propensity for cratering of the epoxy laminate, there is increased concern for the formation of cracks during S&V testing that might not become complete electrical opens. If the testing is meant to replicate shipping conditions, a more effective method for evaluating pass-fail might be to perform D&P analysis of major components following the electrical testing. This is a method to identify and measure any cracks that may have formed. The set pass-fail criteria can be based on the percent of a solder joint that is cracked (for example >10% would be a failure). An S&V test meant to simulate the full life of the product might continue to use the electrical open criteria.

HALT Testing

HALT is often used as a screening tool, and it is not a good predictor of life because the acceleration factor is not known. However, it is very effective at driving realistic failures in a rapid manner, thus allowing performance to be compared between product configurations, or to identify weak aspects of a design to enable continuous improvement. If the new product can survive the same or more cycles before failure, it is a good indicator that it will perform as well in the field. For this reason, HALT has often been successfully employed for the lead-free transition of products. A typical HALT test exposes the product to simultaneous vibration and thermal cycling. The product is tested in the operational mode while the vibration stress is increased with each thermal cycle. The test duration is typically less than a week.

A HALT system

Major OEMs have used HALT testing to successfully evaluate new generations of lead-free products and compare their performance with previous generations of tin-lead products. The objective was to make lead-free products as good or better than their tin-lead predecessors. HALT was able to quickly identify the primary failure mechanisms found with lead-free products. These included PCB pad cratering, trace fracture, inner-plane separation, and poorly formed solder joints. These are all failure mechanisms that would likely occur in the earlier stages of a product’s life if not corrected. Failure mechanisms that HALT did not find were long-term thermal fatigue issues such as barrel cracking in vias or high-cycle solder-joint fatigue failures of resistors and capacitors. For these failures, thermal cycle testing was most useful.

The test parameters depend on the operating temperature limits of the product in question. Note that functional testing is performed while the vibration is taking place. This is important because intermittent opens can be found at this condition. Vibration should start at 0 Grms and step up by 5 Grms each cycle until failure is detected. Failing units should be removed as the chamber is cycling past room temperature. Failing units should be analyzed carefully to find root cause failure. In the event that the PCBA was not the cause of failure, preselected components should be cross-sectioned and the extent of any damage documented.

Corrosion Testing

Electronics continue to be placed into increasingly adverse conditions, and poor air quality and creep corrosion failures are increasing. Such conditions can be found in areas of the world with poor air quality or in industrial environments. Products most affected are those with high airflow and easy access to the electronics.

Creep corrosion on immersion silver

Existing corrosion testing typically focuses on mixed flowing gas exposure at a 70% relative humidity level. This is a mixture of gases such as sulfur dioxide, hydrogen sulfide, chlorine, and nitrogen dioxide in 20–200 ppb concentration levels. Battelle has established levels for testing, but recent findings show these were not set severe enough to reproduce actual corrosive failures in the field. Because the standard mixed flowing gas (MFG) testing has proven insufficient, there are a number of industry groups currently seeking a better test method (IPC 3-11g and an iNEMI effort).

The sulfur clay testing has proven effective in reproducing the creep corrosion observed in high sulfur environments; however, it is difficult to quantify the severity. For this reason, efforts to create an effective test procedure are focused on increasing the hydrogen sulfide levels in the MFG chamber to levels as high as 2000 ppb to cause creep corrosion. The clay test method is an effective way to show if a product is susceptible to creep corrosion. It can then be used to show the effectiveness of any improvements to the product, such as a change in surface finish or the enclosure.

Reliability Audit

Reliability testing commonly occurs on a small sample size of prereleased production product. This practice is necessary but perhaps not sufficient. The first products off the production line were likely built with special attention paid to quality and process control. The true measure of reliability, however, is how well the product is assembled at high volume after a period of time with a stabilized line. This is where ongoing reliability testing (or reliability auditing) becomes important. A common question asked about such testing is, “What do we do with the information if there are failures?” The concern is that a large number of products may have been built and shipped by the time reliability results are known. However, finding and resolving issues late is better than not finding them at all.

A reliability audit can be a subset of the reliability test plan. Typically the sample sizes are smaller and a number of less critical tests can be left out. HALT testing is an example of a good audit test because the test time is only about one week and the sample size may be three to five samples. Testing to failure will provide a good comparison with the preproduct release baseline and will reveal the weak link in the product.

Mechanical shock and vibration is another useful audit test. Thermal cycle testing typically takes too long, and the sample sizes are too large to be practical. Additionally, the results of this test are most dependent on the thermal expansion mismatch of the components and board, which has not changed. The quality of the solder joints can more easily be measured with the HALT test.

Before audit testing, the assemblies should be thoroughly inspected both visually and with x-ray (C-SAM is an additional option). Following testing, critical components should be analyzed with cross-section and D&P.

It is important that the PCBAs to be audited are randomly selected from the production line. The frequency of the auditing must be made clear, and the roles and responsibilities of the functional groups involved in audit testing must be well defined. The test frequency may taper off and eventually cease if no issues are found. Most organizations are not set up to handle this extra workload, so necessary resources must be made available.

Conclusion

With the recent release of the second-generation RoHS requirements, the medical industry can now make concrete plans for the elimination of lead in affected electronics. Fortunately, other industries have been down this path before, and much can be leveraged from their experiences. At this time, nearly all components are available in a lead-free version, and PCB laminates that can withstand the higher processing temperatures are available. Much more is also known about the reliability of SAC305 solder, which has largely become the industry standard. An important part of the transition is to develop a comprehensive reliability test plan designed to reveal any weaknesses or deficiencies in the lead-free product. Such a test plan should take into account the stresses that the product will experience in manufacturing, shipping, and operation. As discussed, a typical test plan might include HALT, S&V, temperature cycling, and corrosion testing, among others. Just as important as the testing are adequate pass-fail criteria and detailed analysis of the tested products.

References

1. J Bath et al., "Comparison of Thermal Fatigue Performance of SAC105 (Sn-1.0Ag-0.5Cu), Sn- 3.5Ag, and SAC305 (Sn-3.0Ag-0.5Cu) BGA Components with SAC305 Solder Paste," (Haverhill, MA: Circuitnet); available from Internet: http://www.circuitmart.com/pdf/comparison_thermal_fatigue.pdf.

2. N Pan et al., “An Acceleration Model For Sn-Ag-Cu Solder Joint Reliability Under Various Thermal Cycle Conditions,” in SMTA International Conference Proceedings, (Chicagp: Small Mount Technology Association, 2005); available from Internet: http://www.smta.org/knowledge/proceedings_abstract.cfm?PROC_ID=1815.

3. J Bartelo et al., "Thermomechanical Fatigue Behavior of Selected Lead-
Free Solders," in Proceedings of the IPC/SMEMA Council APEX 2001 Conference (San Diego: IPC SMEMA 2001).

Author:
Randy Schueller, PhD, and Cheryl Tulkoff

Tuesday, September 20, 2011

Predicting Hardware Reliability for the Data and Telecom Industries Webinar: September 27, 11 a.m. Eastern

Gregg Kittlesen will be giving a very insightful presentation, based on his direct experience in implementing successful Pb-free transitions in several companies in the telecommunications and enterprise markets.Registration is now open.

Monday, September 12, 2011

Lead-Free Reliability Workshop: Oct. 31st in Irvine, CA

IPC Conference on Reliability:
ASSEMBLY PROCESS for a RELIABLE PRODUCT

LEAD-FREE RELIABILITY WORKSHOP: October 31, 2011

CONFERENCE: November 1–2, 2011 • Irvine, Calif.

This unique event will take you through the assembly process — from materials to test and inspection — and provide you with the latest information so you can increase your reliability.

LEAD-FREE RELIABILITY WORKSHOP

October 31
10:00 am to 5:00 pm
Design for Reliability in the Lead-Free Era

Instructor: Cheryl Tulkoff, Senior Member of Technical Staff, DfR

This workshop provides a focused but comprehensive discussion of all issues that can arise during the transition to lead free. All areas of potential risk will be examined, including:
• popcorning
• tin whiskers
• plating failures associated with various solder materials
• plated-through hole (PTH) barrel cracking
• pad cratering
• thermomechanical wearout
• high-cycle fatigue

For each reliability concern, the latest research will be shared and you will learn the best ways to mitigate risk based on a product's design, materials, complexity, volumes and customer expectations of reliability. A final summary will provide you with a roadmap for ensuring the reliability of your lead-free product.

Who Should Attend?
This course is designed for engineers and manufacturing personnel who need to fully comprehend the characteristics of design for reliability (DFR) and how it applies to unique applications.

Register Now!

Sunday, September 4, 2011

Alternative Pb-Free Alloys Continue to Proliferate to Meet Market Demand

While Sn3.0Ag0.5Cu (SAC305) still dominates, alternative Pb-free solders continue to proliferate to meet market demand. PC vendors are encouraging suppliers to eliminate SAC305 to reduce cost (SAC305: $42/lb,SACX0307: $28/lb, SN100e: $22/lb, SN100C: $15/lb), high-rel OEMs are still not satisfied with SAC305 performance, and iNEMI is testing over ten non-SAC305 Pb-free alloys. How to choose? DfR can help. We can guide you in the proper selection of these materials and perform the complex testing and analysis necessary to mitigate risk. For more information, please contact Randy Schueller, rschueller@dfrsolutions.com.

Monday, April 25, 2011

DfR Solutions' Cheryl Tulkoff will be teaching at the ICSR in Toronto on May 3rd

Cheryl Tulkoff, a Senior Member of the Technical Staff at DfR Solutions will be in Toronto, Canada at the International Conference on Soldering and Reliability, May 3-5. On May 3rd, she will be teaching two programs: “2nd Generation Lead Free Alloys: is SAC the Best We Can Do?” and “High Reliability: Solving Problems with Reliability in the Lead-Free Era”. Check website for details: http://www.smta.org/education/symposia/symposia.cfm

While Cheryl is in the area, she will be available an onsite complimentary presentation, please contact June Caswell at jcaswell@dfrsolutions.com. If you would like more information regarding DfR’s services, please contact ctulkoff@dfrsolutions.com.

Friday, April 15, 2011

DfR at The International Conference on Soldering & Reliability 2011

International Conference on Soldering & Reliability 2011
Co-located with Lead-Free Academy & SMTA Toronto Expo
May 3-6, 2011
Crowne Plaza Toronto Airport Hotel
Toronto, Ontario, Canada

The drive for smaller, more functional consumer electronics along with the need for highly reliable electronics for industrial, bio-medical, aerospace and automotive applications have kept the material, process and quality engineers busy planning for the future. These drive the many challenges such as the use of finer powders in solder paste, the greater need for heat dissipation, the use of novel components and technologies. In addition, the European Union’s RoHS directive has now been joined by those of REACH, the dimethyl fumarate ban and the new Canadian Management plan on substances of concern for electrical and electronic equipment complicating matters considerably. The use of tailored alloy systems, the variety of alloy choices, and smaller passive component assembly are among the concerns being addressed. Soldering and reliability engineers and designers need to come together to share their knowledge and their vision for addressing these challenges.

PROGRAM OUTLINE
SMTA Lead-Free Academy
Tuesday May 3, 2011

Click on the tutorial titles below to view the full descriptions.

Tuesday, May 3
T1: 2nd Generation Lead Free Alloys: Is SAC the Best We Can Do?
Cheryl Tulkoff, DfR Solutions: 8:30a.m. – 12:00p.m.

T2: Solder Joint Reliability—Failure Mode and Root Cause Analyses (Fatigue, Brittle Fracture, ENIG)"
Werner Engelmaier,Engelmaier Associates, L.C.: 8:30a.m. - 12:00p.m.

Tuesday, May 3
T3: High Reliability: Solving Problems with Reliability in the Lead-Free Era
Cheryl Tulkoff, DfR Solutions: 1:30p.m. – 5:00p.m.

T4: Solder Joint Reliability—Acceleration Models, Accelerated Reliability Tests and Screening Procedures
Werner Engelmaier,Engelmaier Associates: 1:30p.m. – 5:00p.m.
Conference Schedule
Wednesday, May 4, 2011

Hours: 8:50a.m. - 6:00p.m.
Thursday, May 5, 2011
Hours: 8:50a.m. - 5:30p.m.
Friday, May 6, 2011
Hours: 8:40a.m. - 12:00p.m.

The 2011 ICSR speakers include:
  • Vladimar Igoshev, SENTEC Testing Laboratory
  • Emad Al- Momani, Binghamton University
  • Barbara Koczera, Test Research USA
  • Keith Howell, Nihon Superior
  • Walter Jager, Intertek
  • Mike Bixenman, Kyzen Corporation
  • and many more...
  • Registration

    Friday, April 8, 2011

    DfR Solutions in Europe (France, Finland, Sweden, England, Austria, Switzerland: April 11-18)

    Responding to overwhelming demand, Craig Hillman will be visiting several companies in Europe to discuss a variety of topics, including QFNs, Pb-free, design for reliability, copper interconnects in component packaging, and wearout of integrated circuits. If you and your associates are interested in an onsite visit and/or presentation on a these topics or others, please contact June Caswell, jcaswell@dfrsolutions.com, as soon as possible.

    Thursday, March 10, 2011

    DfR Launches the Shock and Vibration Partnership

    With companies representing a range of industries (medical, military, avionics, solder), DfR Solutions launched the Shock and Vibration Partnership on January 21, 2011. This activity will use a combination of simulation and testing to identify the most effective vibration and shock mitigations. Solutions such as underfill, staking compounds, dummy ball, solder alloy, and corner slots will be benchmarked in regard to cost, manufacturability, effect on thermal cycling, and ability to mitigate shock and vibration damage. If you would like more information on this activity, contact Joelle Arnold, jarnold@dfrsolutions.com.

    Sunday, January 2, 2011

    DfR at PERM in Coral Gables, FL. January 11-13


    Jim McLeish will be providing an update on the status of MIL-HDBK-217 at the Pb-Free Electronics Risk Management (PERM) Consortium meeting in Coral Gables, Florida January 11-13, 2011. For more information or to arrange a meeting, please contact Jim McLeish.


    The Pb-free Electronics Risk Management Consortium

    About PERM
    The purpose of the Pb-Free Electronics Risk Management (PERM) Consortium (formerly known as LEAP) is to provide overarching leadership and coordination of Pb-free electronics risk management activities for the government and industry aerospace and defense communities.

    The goal of PERM is to better respond to the long term challenges of Pb-free solders and finishes over a systems life cycle.

    The PERM Consortium addresses executive leadership, communications, research coordination, standards, training, advocacy, supply chain, and international cooperation through dedicated task teams and advisory groups.

    The PERM Consortium is chartered by the Aerospace Industries Association (AIA) and includes support from DoD, DoE, Army, Air Force, Navy, FAA, NASA, and industry.

    Friday, November 5, 2010

    DfR Solutions Presents at IPC High Reliability Workshop

    Cheryl Tulkoff, Senior Member of the Technical Staff, will be presenting "Solving Problems with Reliability, Repair and Rework in the Lead-Free Era" at IPC's High Reliability Workshop on December 8, 2010, in Santa Clara, California.

    This session addresses potential reliability issues within lead-free processes, current state of industry knowledge and risk mitigation based on product design, materials, complexity, volumes and customer expectations of reliability. The session summary includes a roadmap for ensuring the reliability of lead-free product.

    For more information or to register, please visit the IPC event website.

    Wednesday, November 3, 2010

    Shock and Vibration of Pb-free

    DfR has announced it is building upon its successful SBIR Phase I Partnership Program. Where SBIR Phase I Partnership focused on capturing the behavior of Pb-free solder under shock and vibration, the SBIR Phase II Partnership will focus on quantifying the value of various mitigation strategies, including staking, underfill, dummy ball / ball removal, and cutouts. Participants will not only have exclusive access to the largest investigation into Shock and Vibration of Pb-free solder ever performed, they will also finally be able to capture the cost / risk tradeoffs necessary for a successful product launch. For more information, please contact Craig Hillman, chillman@dfrsolutions.com.

    Sunday, October 24, 2010

    BGA Reballing - A High Reliability Necessity

    The military and high reliability market segment have maintained a higher level of stability over the past couple of years. Military manufacturers are, for the most part, still using Sn/Pb materials. The commercial industry has used Pb-free for several years and the medical industry will be following in the next couple of years. Military suppliers are using approaches such as reballing of BGAs with Sn/Pb to utilize them. DfR has extensive experience regarding the reliability of the reballing of BGA packages. Joelle Arnold, jarnold@dfrsolutions.com, recently presented a joint paper with Stephan Meschter of BAE at the IMAPS Advanced Technology Workshop on High Reliability Microelectronics for Military Applications.

    Wednesday, October 20, 2010

    DfR at SMTA International in Orlando, FL: October 24-28

    DfR Solutions will be presenting two workshops at the SMTAI. Randy Schueller will present "The Reality of Pb-Free Reliability" on Monday, October 25 at 1:30p.m. Craig Hillman will present "Contamination and Cleanliness: Developing Practical Responses to a Challenging Problem" on Monday, October 25 at 1:30p.m.

    Monday, September 13, 2010

    DfR at Pb-Free Electronics Risk Management (PERM) meeting in Bloomington, IN: September 21-23

    Jim McLeish will be attending the PERM meeting in Bloomington, IN September 21-23. For more information or to arrange a meeting during the conference, contact Jim McLeish, jmcleish@dfrsolutions.com.


    The Pb-free Electronics Risk Management Consortium

    About PERM
    The purpose of the Pb-Free Electronics Risk Management (PERM) Consortium (formerly known as LEAP) is to provide overarching leadership and coordination of Pb-free electronics risk management activities for the government and industry aerospace and defense communities.

    The goal of PERM is to better respond to the long term challenges of Pb-free solders and finishes over a systems life cycle.
    The PERM Consortium addresses executive leadership, communications, research coordination, standards, training, advocacy, supply chain, and international cooperation through dedicated task teams and advisory groups.

    The PERM Consortium is chartered by the Aerospace Industries Association (AIA) and includes support from DoD, DoE, Army, Air Force, Navy, FAA, NASA, and industry.

    PERM White Paper

    Tuesday, September 7, 2010

    CTEA Electronics Design & Manufacturing Tech Forum & Expo: Oct. 7th!

    Central Texas Electronics Association

    Electronics Design & Manufacturing Tech Forum & Expo
    Thursday, October 7, 2010
    Norris Conference Center at Northcross Mall in Austin

    Program:

    10:30 – 5:00 Trade Show Open

    11:00 - First Presentation, Dr. Randy Schueller, DfR Solutions:

    "Key Reliability Risks on Pb-free Products"

    Noon - Complimentary Lunch and Door Prize Drawings

    1:00 - Second Presentation, Iga Hallberg, HelioVolt:

    "Solar Power - Macroeconomic Trends"

    2:15 - Third Presentation, Dr. Ron Lasky, Indium Corporation / Dartmouth College:

    "Establishing a High-Yield, Pb-free Process, including Ultra Fine Pitch Printing
    for Passives and CSPs"

    3:00 - Afternoon Refreshments, Networking, and Door Prize Drawings

    3:30 - Fourth Presentation, David Carey, UBM TechInsights:

    "Packaging for Portables: Going Vertical and Getting Small"

    5:00 - Door Prize Drawings & Trade Show Closes


    Registration Via SMTA Website

    This event is complimentary for SMTA and IMAPS members and non-members.

    Event Location: Norris Conference Center at Northcross Mall (backside), 2525 West Anderson Lane, Austin, Texas

    In Central Texas, SMTA and IMAPS work together as the Central Texas Electronics Association. (CTEA)

    Saturday, September 4, 2010

    Shock and Vibration of Pb-free

    DfR has announced it is building upon its successful SBIR Phase I Partnership Program. Where SBIR Phase I Partnership focused on capturing the behavior of Pb-free solder under shock and vibration, the SBIR Phase II Partnership will focus on quantifying the value of various mitigation strategies, including staking, underfill, dummy ball / ball removal, and cutouts. Participants will not only have exclusive access to the largest investigation into Shock and Vibration of Pb-free solder ever performed, they will also finally be able to capture the cost / risk tradeoffs necessary for a successful product launch. For more information, please contact Craig Hillman, chillman@dfrsolutions.com

    Monday, August 30, 2010

    Manhattan Project Report - Phase 2

    The DoD continues to move forward on Pb-free with the release of Phase 2 of the Lead Free Electronics Manhattan Project. This report details the projects and costs believed to be necessary to characterize and mitigate the risk of Pb-free solder in severe environments. Anyone have $100 million lying around? For more information on successfully transitioning to Pb-free, please contact Cheryl Tulkoff, ctulkoff@dfrsolutions.com.