DfR Solutions' Sherlock Helps Eliminate Pad Cratering

Tired of breaking components during Bed of Nails In-Circuit Testing (ICT)? DfR's Automated Design Analysis Tool, Sherlock, now provides an elegant solution to this consistent design for manufacturability (DfM) problem. Within a matter of minutes, test points, components, and supports can be arranged and located to minimize board flexure and effectively eliminate pad cratering or solder joint cracking. For more information, contact Tom O'Connor.

DfR's Cheryl Tulkoff to present IPC APEX Professional Development Course on DFM

Sun, Feb 26, 2012 - 9:00 AM to 12:00 PM

PD08: Design for Manufacturing

Presenter/Committee Chair(s):
Cheryl Tulkoff, Senior Member tech staff, DfR Solutions

Topic/Track: Design

Event Type: Professional Development

Level: Intermediate

Gain first-hand information on issues that impact both leaded and lead-free manufacturability and performance requirements; the course will offer practical recommendations for meeting the challenges of managing the interconnection of both through-hole and surface mount technology at the bare board level. Increasingly sophisticated PCB fabrication technologies and processes will be discussed, including: laminate selection, trace width and spacing, solder mask and finishes. Design for manufacturability (DFM) best practices ensure that manufacturing capability is taken into consideration during the design and layout of a product. Understanding the effects of - and how to avoid - overtaxing their manufacturer, engineers can be more confident about design execution. Participants will gain a greater understanding of potential manufacturability hazards to avoid during the design process.

What You Will Learn

• Printed boards and process material selection
• Plated-through hole design
• Conductor width and spacing
• Keep-out zones
• Copper balancing
• Microvias, via fill technologies
• Multiple lamination
• Equipment process controls and reliability testing
• Matching PCB complexity to supplier capabilities
• Partnering and off-shore strategies
• Importance of supplier report cards to monitor quality and reliability
• Cover circuit card assemble
• Pad geometries, component spacing and location
• Heat sink selection
• Standoffs and wiring
• Influences of PCB thickness, cut-outs, and depanelization techniques on reliability
• Comparison of surface mount, wave and hand soldering
• Moisture Sensitivity Level handling, process optimization and control strategies, repair and rework.

IPC Designers Council Webinar in Huntsville, AL on October 26

Cheryl Tulkoff will be presenting a webinar on "DFM for PCB." The meeting will be a "lunch and learn" webinar at the AdTran facility in Huntsville and will be conducted by the IPC Designers council. For more information contact Cheryl Tulkoff.

IPC Summer School Webinar: DFM, Design for Manufacturing

DFM-Design for Manufacturing
Cheryl Tulkoff, DfR Solutions
Wednesday, August 3
10:00 am–11:00 am CT

Sign up here!

Design for manufacturability (DFM) best practices ensure that manufacturing capability is taken into consideration during the design and layout of a product. By understanding the potential effects of — and how to avoid — overtaxing their manufacturer, engineers can be confident in the execution of their design. Attendees will come away with a greater comprehension of the potential manufacturability hazards to avoid during the design process, and an understanding of the benefits of DFM.

What You Will Learn

• Printed board design and process material selection
• Equipment process controls and reliability testing
• Matching pcb complexity to supplier capabilities
• Influences of PCB thickness, cut-outs, and depanelization techniques on reliability
• M.S.L, handling, process optimization and control strategies, repair and rework

About the Instructor

Cheryl Tulkoff is a senior member of the DfR Solutions staff. Her areas of expertise include semiconductor fabrication, electronics assembly, RoHS conversion, and reliability engineering and management. Prior to joining DfR, Tulkoff developed a comprehensive reliability organization at National Instruments, including creation of an internal failure analysis group and a closed-loop reliability program. She has also taken the lead in process development and implementation in semiconductor fabrication in electronics assembly at Cypress Semiconductor and IBM.

DfR Solutions in Harrisburg, PA: May 31-June 2

Cheryl Tulkoff will be in the Harrisburg, PA area May 31 - June 2 and is available for onsite discussions and presentations on a variety of topics, including technology insertion, design for manufacturability and reliability, reliability prediction and root-cause analysis. If you would like to schedule a visit to your company, please contact June Caswell, jcaswell@dfrsolutions.com.

Design for Excellence (DfX) West is almost here!

The five-day seminar will be held in San Jose, California, on April 19-23, 2010. This one-of-a-kind collaborative effort will provide designers, reliability personnel, and engineering management with tools on how to meet time-to-market deadlines and reduce warranty issues.

Two tracks are available; however, each course is priced individually to allow attendees to register for the specific courses which best fit their individual needs. Feel free to mix-and-match. If you can't attend for the entire week, select the course(s) most valuable to you.

Cost: Two day = $1195, One day = $695, Half day = $395. Webinar costs are 25% less.

Track 1: DfX
Monday: Design for Reliability (1 day)
Tuesday: Design for Environment (1 day)
Wednesday: Design for Manufacturability (1 day)
Thursday: Design for Testability (1 day)
Friday: Software Design for Reliability (1/2 day) and Design for Warranty (1/2 day)

Track 2: ALT/RCA
Monday & Tuesday: Best Accelerated Life Tests (2 days)
Wednesday & Thursday: Root Cause Analysis (2 days)
Friday: Design for Mechanical Reliability (1 day)

Click here to view the Introduction to DfX Concepts webinar from Qualmark's Ask the Experts series. For more information, or to register, please click here or e-mail tsmittenaar@dfrsolutions.com.

Design for Excellence (DfX) Bay Area is Coming! April 19-23 (San Jose, CA)

The electronics industry is demanding Excellence! Can you deliver? Learn how at DfR Solutions' upcoming DfX training in San Jose, CA. In collaboration with IPC, Ops Ala Carte, and Value Engrafting, DfR is providing training on all the DfX tools (DfR, DfM, DfT, DfE, DfW) as well as Accelerated Life Testing and Root-Cause Analysis. To register, please click here or contact Tammy Smittenaar, tsmitteraar@dfrsolutions.com.